Posts

Verilog code for Full Adder in different abstraction levels

Image
Verilog code for Full Adder in different abstraction levels: A Full Adder is a combinational logic circuit which has three inputs and two outputs. It adds the three binary values and gives two outputs sum and carry . These full adders can be cascaded to form an n-bit ripple adder. It is mainly used in ALU to perform arithmetic operations. The functionality of full adder for different inputs is shown in the below table. a b c sum carry 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1                                                               Functional table of a full Adder Design/RTL code: Now, let’s see the Verilog code to implement the full adder using different abstraction l
Post a Comment
Read more

verilog code for shift register IC7495

Image
VERILOG CODE FOR SHIFT REGISTER IC 7495:       Shift register is a sequential logic circuit, which is used for digital data storage. It consists of a group of flip-flops connected in a chain so that the output from one flip-flop is connected to the input of next flip-flop. All the flip-flops are driven by a common clock, and all are set or reset simultaneously. The fundamental shift registers are classified as Serial In - Serial Out, Serial In - Parallel Out, Parallel In - Serial Out, Parallel In - Parallel Out, and bidirectional shift registers. IC7495: It is a  4-Bit Shift Register with serial and parallel synchronous operating modes.  It has one serial input (DS) and four Parallel data inputs(P0-P3) and four parallel data outputs (Q0 - Q3).  The serial or parallel mode of operation is controlled by a mode control input (S) and two clock Inputs (CP1) and (CP2). For serial mode, S=0 and for parallel mode, S=1. The serial or parallel data transfers occur synchronous w
Post a Comment
Read more